Nate Edel wrote:
> Bill Davidsen <> wrote:
>> troop wrote:
>>> In article <>, westes-am
>>> says...
>>>> What is the difference between the Q6700 and QX6700 quad core processors?
>>>> They seem to have very similar specs, but QX6700 gets a very big price
>>>> premium.
>>> upward unlocked multiplier is one difference--the Q multiplier can be reduced only.
>> Have any of the Core2 line been release with HT enabled? The hardware
>> seems to be present but disabled, like turning it off in the BIOS.
>
> That doesn't match anything I've read - what's your basis for thinking Core
> 2 has HT (/SMT) in hardware but disabled?
>
Two suggestions, the HT bit is set, and the number of siblings is two.
On single-core it was one, and on SPARC multi-thread CPUs it is reported
as four. Clearly what's in the registers could be misleading, there was
another thing to check in the old PentiumD top of the line (950?) with
HT enabled.
There's another bit set in the flags, but I can't find the discussion I
was reading, and there was a comment about "future processors" when the
Core2 came out, which makes me think Intel was still looking at SMT. And
for some things sharing the L1 cache will really help.
--
Bill Davidsen
He was a full-time professional cat, not some moonlighting
ferret or weasel. He knew about these things.