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Finding out the instruction cache size

 
 
Philipp Pichler
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      12-04-2008, 01:06 PM
Hi all

I have tried the following example which reads out some information
about the processor:

http://www.tepid.org/~weingart/cpuid.c

The following results I get

Base-Cache-Desc: 1 page(s) of cache descriptors
Base-Cache-Desc(0x60): 16K 8-way, 64-byte line, level 1 data cache
Base-Cache-Desc(0x5B): 64-entry, 4K page data TLB, fully associative
Base-Cache-Desc(0x51): 128-entry, 4K page instruction TLB, fully associative
Base-Cache-Desc(0x7D): 2M 8-way, 64-byte line, level 2 unified cache
Base-Cache-Desc(0x70): 12K-uops 8-way trace cache
Base-Cache-Desc(0x40): Found EOC indicator!
Base-PSN: disabled
Base-Cache-Det: nthr=1, full=0, init=1
Base-Cache-Det: ppart=1, sline=64, nset=32, pref=64
Base-Cache-Det: 16KB 8-way 64 byte/line level-1 Data Cache
Base-Cache-Det: nthr=1, full=0, init=1
Base-Cache-Det: ppart=2, sline=64, nset=2048, pref=64
Base-Cache-Det: 2MB 8-way 64 byte/line level-2 Unified Cache

The problem is, I cant see any information about the instruction cache
size. Does anyone have a codeexample where I could read out this
information?

Many thanks
 
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