Your Pentium 4 1.7 GHz has a 256 Kbyte L2 cache. Later Pentium 4 CPU's have
512 Kbytes L2 cache. Pentium 4 class Celeron CPU's have 256 Kbytes L2
cache. Xeon CPU's have up to two Mbytes L2 cache. The L2 cache stores
information that was last used by the CPU, in blocks that are tied to the
actual main memory address. Since code is generally contiguous, and data
tends to be contiguous, this provides a speedy response to memory contents
access in most cases, greatly reducing the effect of memory latency.
Depending on the task and how the code is written, an L2 cache can more than
double the throughput. One example is the client for SETI@home... a CPU
with a 2 Mbyte L2 cache processes a work unit much faster than the same CPU
type and clock speed with a 512 Kbyte L2 cache. Part of this difference
could be eliminated if the code were rewritten to use a smaller L2 cache
efficiently. For some other applications the L2 cache makes little
noticable difference. The L2 cache is an attempt to bridge between the very
fast CPU clock speed and multiple instruction execution per clock cycle and
the slower memory clock. The greater the difference the more the L2 cache
helps.
SySoft Sandra has a test module that graphically shows the effect L2 cache
size vs. code and data block size.
Phil Weldon,
"Daniel Yates" <> wrote in message
news:ral8b.1138$...
>
> "Frank Weston" <> wrote in message
> news:...
> > From the horse's mouth (Microsoft):
> >
> > Begin quote.....
> >
> > SecondLevelDataCache records the size of the processor cache, also known
> as
> > the secondary or L2 cache. If the value of this entry is 0, the system
> > attempts to retrieve the L2 cache size from the Hardware Abstraction
Layer
> > (HAL) for the platform. If it fails, it uses a default L2 cache size of
> 256
> > KB. If the value of this entry is not 0, it uses this value as the L2
> cache
> > size. This entry is designed as a secondary source of cache size
> information
> > for computers on which the HAL cannot detect the L2 cache.
> >
> > This is not related to the hardware; it is only useful for computers
with
> > direct-mapped L2 caches. Pentium II and later processors do not have
> direct-
> > mapped L2 caches. SecondLevelDataCache can increase performance by
> > approximately 2 percent in certain cases for older computers with ample
> > memory (more than 64 MB) by scattering physical pages better in the
> address
> > space so there are not so many L2 cache collisions. Setting
> > SecondLevelDataCache to 256 KB rather than 2 MB (when the computer has a
2
> > MB L2 cache) would probably have about a 0.4 percent performance
penalty.
> >
> > End quote....
> >
> > Seems to me that unless you're running a P2 or older that this is a
> > non-issue.
> >
> <snip>
>
> Setting the SecondLevelDataCache to 2MB??? Thats seems a very high value
to
> me?
>
> Either way I am not 100% clued up no the actions of L2 but your post has
> helped a little. thought I would share the article as when I checked my
> setting on a P4 1.7Ghz there was no value at all.
>
> Regards
>
> Daniel Yates
>
>