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Difference of core registers and peripheral registers

Discussion in 'Embedded' started by Ravi kumar.N, Mar 14, 2005.

  1. Ravi kumar.N

    Ravi kumar.N Guest

    Respected Experts,
    I am Ravi Kumar.N, working on intel processor. I
    am new to embedded system. I have a query regarding the registers.

    1) I have seen two types of registers
    a) Processor core architecture registers.

    b) Processor peripheral registers.


    2) I would like to know what is the difference between these two
    registers.

    Thanks in advance
    Ravi Kumar.N
     
    Ravi kumar.N, Mar 14, 2005
    #1
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  2. Ravi kumar.N

    Thad Smith Guest

    "Ravi kumar.N" wrote:

    > I am Ravi Kumar.N, working on intel processor. I
    > am new to embedded system. I have a query regarding the registers.
    >
    > 1) I have seen two types of registers
    > a) Processor core architecture registers.
    >
    > b) Processor peripheral registers.
    >
    > 2) I would like to know what is the difference between these two
    > registers.


    The difference has more to do with history and product differences
    than functionality. The early model(s) of the processor define the
    core architecture. This would include all the working registers for
    computing and maybe some I/O registers, if the original processor was
    an embedded type, such as ports 0 - 3 and timer 0 for an 8051
    processor. Later models have more features. The added features would
    be described as peripheral features.

    A good example of this, also based on the Intel 8051 architecture, is
    the ST Microelectronics Micro-PSD line of processors, which has an
    8051 core, including 8051 I/O ports, plus added memory and ports
    mapped into the XDATA (external to original processor design) memory
    space, but still on chip. The way of addressing the original
    peripherals and added peripherals is different, because they wanted to
    maintain the core processor the same. Also, the added features were
    originally in a separate IC, now they are in the same package, but the
    technique of addressing them remains similar to the earlier split IC
    design.

    What it means on a practical basis is that you might have separate
    documentation for the different sections of the processor. Also, if
    you integrate a previously separate IC, you might see vestiges of old
    features that are not supported in the combined chip, such as a
    separate selectable mode or I/O bit that is not relevant to the
    integrated part.

    Thad
     
    Thad Smith, Mar 14, 2005
    #2
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