PCI Bus Enumeration

Discussion in 'IBM' started by John Flynn, Jan 26, 2004.

  1. John Flynn

    John Flynn Guest

    Could someone explain to be what is meant by the phrase "PCI
    Enumeration"? I think that it has something to do with initialising
    the PCI bus and devices.

    How is this done by a BIOS or the Operating System. What if you are
    not running with an OS what happens to the PCI devices and does
    enumeration still take place?

    What effect has a PCI bridge or a Compact PCI bridge have on the
    Enumeration process?

    Obviously, if there are webpages out there that has this information
    then point me to them. My question is not related to any specific
    Operating System (Windows or Linux) it is just a general question.

    Thanks,
    J
     
    John Flynn, Jan 26, 2004
    #1
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  2. John Flynn

    daytripper Guest

    On 26 Jan 2004 03:55:34 -0800, (John Flynn) wrote:

    >Could someone explain to be what is meant by the phrase "PCI
    >Enumeration"? I think that it has something to do with initialising
    >the PCI bus and devices.
    >
    >How is this done by a BIOS or the Operating System. What if you are
    >not running with an OS what happens to the PCI devices and does
    >enumeration still take place?
    >
    >What effect has a PCI bridge or a Compact PCI bridge have on the
    >Enumeration process?
    >
    >Obviously, if there are webpages out there that has this information
    >then point me to them. My question is not related to any specific
    >Operating System (Windows or Linux) it is just a general question.
    >
    >Thanks,
    >J


    Enumeration is the process of hunting for every possible PCI agent, usually
    using Config (Space) Reads to the Device/Vendor ID register address (a dword
    at x00h), while stepping the IDSEL addresses (bits 31:11 on each bus segment).

    Only one device on any segment can be accessed with any single IDSEL, and if a
    device does not respond to the Config Read (ie: a Master Abort occurs) the
    enumeration process interprets this to mean there is no device behind the
    currently tested IDSEL, and moves on to the next.

    Bridges merely require that the original transaction be formatted to pass
    through the bridge to the subordinate segment (and as bridged segments can
    also have bridged subordinate segments, to even more hierarchically
    subordinate segments).

    If you have access to a PCI Bus spec or any decent book on the architecture,
    check out the difference between a Type 0 and Type 1 Configuration access.

    cheers

    /daytripper
     
    daytripper, Jan 27, 2004
    #2
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