Brian Griffin wrote:
> At the moment I have two 512MB modules in slots 1 and 4. I want to upgrade
> to a total of 3GB by using two additional 1GB modules to make a total of
> four modules. The Users manual says "If four DDR memory modules are
> installed, (two pairs of DDR memory modules with the same memory size and
> type): The Dual Channel Technology will operate when a pair of DDR memory
> modules are inserted into DIMM 1, 4 and another pair into DIMM 2, 5." Do the
> two pairs have to be the same or can one pair be 512MB (in slots 1, 4) and
> the other pair be 1GB (in slots 2,4) or do all four modules have to be
> identical?
> Cheers,
> Brian
>
For dual channel, you want the same memory dimensions for the modules
that are paired. The pairs can be different than one another, so your
2x512MB + 2x1GB configuration should be OK, using them as you describe.
875 memory guide
(See Figure 5 & Figure 6 on Page 11)
ftp://download.intel.com/design/chip...s/25273001.pdf
The configuration you'll be using, is called "Normal Mode" in the
guide. I wouldn't expect a big difference in performance between
Normal Mode and Dynamic Mode. (Page 13 has a table, which ranks
the different modes, but the table lacks numbers to show how
significant the effects are.)
To test, you can try a benchmark with just the pair of 1GB
installed, and then rerun the benchmark with all four installed.
On my 875 machine, using memtest86+ bandwidth indicator, I
didn't get any difference in measured bandwidth, but that
isn't really unexpected, due to the sequential access pattern.
It is really hard to say, exactly what program would gain
a big advantage from any of these modes that rely on
interleave patterns or "open" pages.
For a benchmark, I recommend SuperPI as a simple, single threaded
test. You pick a number of digits, which results in the memory
footprint not fitting entirely in cache. Since a P4 has a
relatively small cache, you can use 1 million digits of PI
calculation as your test. 1 million digits seems to use
8MB of RAM (the P4 cache is smaller than that). Larger numbers
of digits take longer to calculate, and for some of the processors
with larger cache, or faster execution times, people use the
32 million digit test.
This bench was written a long time ago. The source is no longer
available (a guy in Japan wrote it). Improvements to the program
have been made over the years, by adding extra bytes with a hex
editor. So if the program seems a little antique looking, there
is a reason for that.
http://www.xtremesystems.com/pi (I cannot reach here right now)
http://www.techpowerup.com/downloads/366/
On my P4 and AthlonXP 3200+ systems, this benchmark takes 45-50
seconds to complete, for 1 million digits. The 50 second number
was on the machine that was running AV in the background. The
P4 was running at 3.1GHz. So that is the ballpark range I'd
expect to see.
You may be wondering, why the Intel document only refers to
four slots, when your board has six. Your board is an anomaly,
in the sense that Gigabyte has chosen to fool you into thinking
it can use a lot of RAM. They used a trick which was used back
in the single channel days. They add an extra slot to a channel,
then cross-wire the ranks. The chipset can control four ranks
(sides) of memory per channel (which I show below as A,B,C,D).
The three DIMMs per channel on your board, is a total of six sides.
This is the wiring pattern. Six physical sides, but only four
controls for them.
Slot 1 A
B
Slot 2 C
D
Slot 3 D
C
If you wanted to put RAM in both slot 2 and slot 3, the RAM could
only be single sided. (Thus C gets used in slot 2, and D gets used
in slot 3.) If you put a double sided stick in slot 2, that
uses both C and D, and then nothing can go into slot 3.
HTH,
Paul
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