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1pSec Jitter

Discussion in 'Embedded' started by Joe G \(Home\), Jan 14, 2006.

  1. Hi All,

    I have a FPGA system which requres better than 1pSec jitter.

    When I ask the Xtal MFG they advise there are 2 methods of measuring Jitter
    Peak to Peak and an averaging method

    Measuring the same Xtal the result can be significatly differment values
    between the 2 methods.

    Does any one have any information on the 2 methods (or more) how to measure
    jitter.

    What would FPGA input expect?

    Regards
    JG
     
    Joe G \(Home\), Jan 14, 2006
    #1
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  2. Joe G \(Home\)

    Gob Stopper Guest

    What do you mean by 1 psec jitter? Do you mean Rj, Dj, Tj? Are you
    measuring Time Interval error, cycle-to-cycle, or something else?

    I would recommend doing some reading. You can start at
    http://www.agilent.com/find/jitter

    Scroll down to "Key Library Information" and download (and read) all of
    the White Papers and Application notes.

    One of the first things you'll find is that it's probably impossible to
    measure 1psec of jitter. As with any other measurement, there is the
    concept of the smallest measureable unit. In the jitter world, this is
    the Jitter Measurement Floor, and typical values are 80 fsec to 2 psec.

    I personally can't imagine anything going on in an FPGA that would be
    affected by 1 psec of jitter. More info would be advisable.

    GS
     
    Gob Stopper, Jan 14, 2006
    #2
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  3. Sorry,

    The Osc driving the FPGA calls for 1pSec jitter.

    I am just trying to understand the 2 methods and how they relate to FPGA
    requirements.

    JG
     
    Joe G \(Home\), Jan 14, 2006
    #3
  4. Joe G \(Home\)

    John Larkin Guest

    The only meaningful way to measure jitter is RMS. And even then, you
    have to specify the time interval over which it's to be measured.
    Peak-peak is poorly defined, but figure it's roughly 5 times RMS.

    In the telecom biz, any time variances measured within 0.1 second or
    less is "jitter", and above that it's "wander."

    A normal sampling scope measures one or at most a few periods of the
    input signal, which is "short-term" or "single period" jitter.

    1 ps jitter is hard to measure. There are crystal oscillators that can
    do less than 1 ps. By the time you pass it through an FPGA, expect the
    result to be 10's of ps, maybe more.

    Why do you need 1 ps jitter?

    John
     
    John Larkin, Jan 14, 2006
    #4
  5. Joe G \(Home\)

    Chuck F. Guest

    Circa 1970 I built a system for transmitting voice band, which was
    basically pulse duration modulated. The start was controlled by a
    separate clock. IIRC signal/noise measurements on the results
    indicated less that 1psec short term jitter. My memory seems to
    specify a pulse width in the range 0.25 to 1.25 uSec at about 12
    Khz repetition rate, and a s/n ratio of better than 90 db.

    We were only interested in the noise level in the telephone audio
    band, roughly 300 hz to 3600 hz. We traded off repetition rate to
    simplify (and cheapen) equalization and aliasing filters, and met
    all signal quality objectives.

    --
    "If you want to post a followup via groups.google.com, don't use
    the broken "Reply" link at the bottom of the article. Click on
    "show options" at the top of the article, then click on the
    "Reply" at the bottom of the article headers." - Keith Thompson
    More details at: <http://cfaj.freeshell.org/google/>
     
    Chuck F., Jan 14, 2006
    #5
  6. Joe G \(Home\)

    Thad Smith Guest

    The oscillator calls for? I thought this was a requirement from the
    FPGA. Do you mean that the FPGA calls for an oscillator jitter not to
    exceed 1 ps? What is the frequency? Is the FPGA running a PLL based
    on the oscillator? Basically, what fundamentally is setting the
    jitter requirement and why?
     
    Thad Smith, Jan 14, 2006
    #6
  7. Joe G \(Home\)

    bill.sloman Guest

    I'd put my money on the "idiot manager" option. Idiot systems engineers
    also exist - "we've got this circuit which introduces 99psec of jitter,
    and the error budget is 100psec, so the clock can't introduce more than
    1psec of additional jitter".

    Then there is idiot sales/marketing person who tells you that he/she
    can sell hundreds of units if you can just break the second law of
    thermodynamics.
     
    bill.sloman, Jan 15, 2006
    #7
  8. Joe G \(Home\)

    Joerg Guest

    Hello Joe,
    Pretty tough requirement. Do you want to build some kind of Doppler?

    Jitter is usually looked at via an eye diagram on a blazingly fast
    scope. The scope manufacturers have app notes about that. But since your
    xtal mfg told you about two methods why not ask them?

    Depends what that FPGA is and what you want to do with it.

    Regards, Joerg

    http://www.analogconsultants.com
     
    Joerg, Jan 15, 2006
    #8
  9. Joe G \(Home\)

    PeteS Guest

    Do you mean the application specifies an oscillator with <1pSec jitter?
    Tight requirement. What is the specific application?

    There are more than two methods for measuring jitter (depending on just
    what it is you are trying to measure). Frequency domain measurements
    are commonly used for Dj prediction (although different test equip.
    mfrs use different techniques). Time domain for cycle to cycle and
    random jitter.
    Long term drift (just what long term is depends on the system) may or
    may not be an issue - that (just like all the other jitter sources) is
    system dependent.

    Note that different mfrs equipment will give you different results -
    even a different set of probes will vary the measurement, particularly
    at the speed you seem to need.
    What FPGA? What application?

    When testing high speed links I designed the physical layer for,
    (5Gb/s) we used Tektronix equipment. Based on what I saw, they had some
    of the best equipment. Look here
    http://www2.tek.com/cmswpt/tifinder.lotr?cn=oscilloscopes&lc=EN
    for some app notes.

    In our application, we had to worry more about cycle to cycle and short
    term peak / rms jitter, but without knowing more I can't say what your
    app would consider an issue.

    Cheers

    PeteS
     
    PeteS, Jan 15, 2006
    #9
  10. Joe G \(Home\)

    John Larkin Guest

    Probably the same guy that was upgrading to a 32-bit CPU and needed a
    32-bit ADC to match.

    John
     
    John Larkin, Jan 16, 2006
    #10
  11. bits ~= dB/6


    Best regards,
    Spehro Pefhany
     
    Spehro Pefhany, Jan 16, 2006
    #11
  12. Joe G \(Home\)

    John Larkin Guest

    So 32 bits is 192 dB. Isn't that just about the ratio of 1 atm to the
    threshold of hearing?

    John
     
    John Larkin, Jan 16, 2006
    #12
  13. This web page says < 1E9, so >180dB.

    http://hyperphysics.phy-astr.gsu.edu/hbase/sound/intens.html

    by their info the threshold of pain is 0.003 of 1 atm.

    I guess things would get nonlinear when you start to approach one bar
    even if it didn't rupture your eardrums.


    Best regards,
    Spehro Pefhany
     
    Spehro Pefhany, Jan 16, 2006
    #13
  14. Joe G \(Home\)

    Rich Grise Guest

    Have you ever seen that stock footage of a nuke? There's a very visible
    shock wave of some kind, that's obviously traveling faster than Mach 1.

    Cheers!
    Rich
     
    Rich Grise, Jan 16, 2006
    #14
  15. Joe G \(Home\)

    Glen Walpert Guest

    Yep, 20 uPa RMS to 1 ATM or 101 kPa RMS is 0 to 194 dB SPL; from the
    lowest threshold of hearing for sensitive youngsters to sound levels
    on the launchpad during a large rocket launch, way into the nonlinear
    region. Now if we could only find a microphone and preamp to cover
    the entire range ...
     
    Glen Walpert, Jan 16, 2006
    #15
  16. ***Warning***Off-topic***Warning

    If you are talking about the "stock footage of a nuke" that
    I think you are talking about, I believe that spherical front
    is a visualization of the Cherenkov Effect.

    See:
    http://almaz.com/nobel/physics/cherenkov.html
    http://www.gae.ucm.es/~emma/tesina/node4.html

    Roberto Waltman

    [ Please reply to the group, ]
    [ return address is invalid. ]
     
    Roberto Waltman, Jan 16, 2006
    #16
  17. Joe G \(Home\)

    Keith Guest

    Supersonic shock waves. What's next?!
     
    Keith, Jan 17, 2006
    #17
  18. Joe G \(Home\)

    John Larkin Guest

    Clips the negative swings, for sure.

    John
     
    John Larkin, Jan 17, 2006
    #18
  19. Joe G \(Home\)

    Stef Mientki Guest

    Technici should be open minded:
    "nothing is impossible untill it's proven"
    at my work we've a 128 channel 32 (or 34) bit AD converter !!
    Stef
     
    Stef Mientki, Jan 17, 2006
    #19
  20. I was getting ~27 bits out of a ADS1252 (after averaging). That is
    only a $6 part.
     
    John Devereux, Jan 17, 2006
    #20
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