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ASIC Physical Synthesis, Physical Compilation requirement in India, Bangalore

Discussion in 'Hardware' started by abdul, Dec 14, 2003.

  1. abdul

    abdul Guest

    For one of our leading Semiconductor clients in Bangalore , India we
    are looking for the following professionals. Kindly go through the
    requirement specifications. Kindly send me your profiles to

    Experience :
    3 - 8 Yrs

    Education : B.E/B.Tech, M.E/M.Tech Computers, Electrical,
    Electronics/Telecommunications, Instrumentation, Computers,
    Electrical, Electronics/ Telecommunications, Instrumentation

    Job Description
    Key Skills : P&R, Backend, Physical synthesis, Physical Compiler,
    Signal Integrity Analysis, Physical Design
    Salary: Will match the best in the industry

    Job Description: Located in Bangalore, India, this individual will be
    responsible for carrying out all the physical design tasks including
    floorplan, power planning, placement, clock-tree synthesis, routing,
    parasitic extraction and physical verification.

    - The ideal candidate will have a minimum of 3 to 8 years of
    experience in the physical design area.
    - Hands-on experience with Apollo / Astro, Physical Compiler,
    Star_RCXT, Astro-Rail, Astro-Xtalk, Primetime and Calibre a must.
    - Must have experience and detailed knowledge pertaining to UDSM (0.18
    micron and 0.13 micron) technologies.
    - Must have successfully taped out at least 3 multi-million gate
    designs in either 0.18/0.13 micron technology.
    - Must be a good team player and should be able to interact with the
    design team to get all the details needed to carry out his/her task
    - Knowledge of synthesis and static timing analysis is a strong plus.

    Kindly let me kow your interests and send me your profile ASAP.

    Thanks and regards,
    Abdul Rasheed

    ICS Consulting,
    TNR Building, Church Street,
    Off Brigade Road,
    Ph: 080-56975540/5550901
    abdul, Dec 14, 2003
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