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Call for papers on Hardware Architectures for Genetic, Neural and Fuzzy Systems

Discussion in 'Embedded' started by Nadia, Mar 4, 2007.

  1. Nadia

    Nadia Guest

    7th. International Conference on Intelligent System Design and
    ISDA 2007, 22-24 October, Rio de Janeiro, Brazil

    Workshop on Hardware Architectures for Genetic, Neural and Fuzzy

    Genetic Algorithms (GA), Artificial Neural Networks (ANN) as well as
    Fuzzy Systems (FS) are becoming omnipresent in almost every
    intelligent system design. Just to name few, engineering, control,
    economics and forecasting are some of the scientific fields that enjoy
    the use of ANN and FS. Unfortunately, the majority of the applications
    is complex and so requires a large computational effort to yield
    useful and practical results. Therefore, dedicated hardware for
    evolutionary, neural and fuzzy computation is becoming a key issue for
    designers. With the spread of reconfigurable hardware such as FPGAs
    and FPAAs, digital as well as analog hardware implementations of such
    computation become cost-effective.

    The focus of this special session will be on all aspects of for high-
    speed hardware implementations for genetic algorithms, neural networks
    and fuzzy controllers. Papers describing hybrid implementations using
    co-design methodology are also welcome. The main topics can be listed
    as follows:

    Topics include, but are not limited to:

    * Hardware implementations of genetic algorithms;
    * Hardware implementations of Neural Networks;
    * Hardware implementations of fuzzy systems;
    * Hardware/Software co-design of GA;
    * Hardware/Software co-design of ANNs;
    * Hardware/Software co-design of FSs;
    * Hardware for hybrid systems

    Important dates:

    * Paper Submission: 16 March 2007
    * Decision Notification: 1 June 2007
    * Camera-Ready Submission: 15 June 2007

    To submit a paper (6 pages using IEEE format) to this workshop, please
    browse the ISDA07 submission page.

    Workshop Organizers:

    Nadia Nedjah
    Electronics Engineering & Telecommunications
    Faculty of Engineering
    State University of Rio de Janeiro

    Luiza de Macedo Mourelle
    Systems Engineering & Computation
    Faculty of Engineering
    State University of Rio de Janeiro
    Nadia, Mar 4, 2007
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