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Cypress FX2 UART1 loop back fails in Mode 2 but OK in Mode 1 (Or "Do you have MCE code for Cypress F

Discussion in 'Embedded' started by Bill Davy, Mar 8, 2008.

  1. Bill Davy

    Bill Davy Guest

    Hi,



    Banging my head against this silly problem when I could be out enjoying the
    rain.



    I cannot see what I am doing wrong. I've reduced it as far as possible, but
    it is still not clear. I have a simple loopback connection on UART1 (I've
    even reduced my code down so it will fit and run on the FX2 DK board).



    In Mode 1 the loopback works fine. I send "ABCD" and I receive it fine.



    In Mode 2 the received characters are gibberish.



    The only change is the value in SCON1.



    I'm using the HSBRG for both UART0 (used for debug) and UART1 (note that
    UART230==3).



    I must say I found the having SM0_1 as the most significant bit of the mode
    and SM1_1 as the least significant bit was not a help. However,
    initialising SCON1 as a byte is quicker/shorter and clearer too.



    What am I doing wrong? I do need the ninth bit for multi-processor
    communications. I've six SiLab F340 to connect to the Cypress on a
    multi-drop serial bus (hence MDSB). Mind you, I am not sure the F340 FIFO
    on the UART1 Rx will help in that context. (The parity error flag clearly
    goes into the FIFO but does the RBX bit? Or do I run in 8 bit data, with
    parity type "space" and then the parity error flag in the FIFO is really the
    ninth bit? And if we are waiting for a "command" byte (ninth bit set), if
    there is following data, it would be nice if receiving one such byte took us
    out of MCE mode. Or do bytes go into the FIFO even if their reception did
    not cause an interrupt. In which case, which byte in the FIFO has the ninth
    bit set?)



    But that is for another day. Right now I cannot even get loopback working
    on the Cypress end!



    Help, please.



    Bill


    The evidence:
    #
    # Build: 14:14:57 on Mar 08 2008, FX2SDK
    'FX2: UART230=3, SCON1=B0, EICON=E8
    Rx:ààð

    #
    # Build: 14:16:22 on Mar 08 2008, FX2SDK
    'FX2: UART230=3, SCON1=70, EICON=E8
    Rx:ABCD

    ---
    Code follows:

    //
    // When ordinary code is accessing shared data, disable
    // the serial interrupt.
    //
    #define EnableSerialInterrupt1(x) ES1 = (x)

    //
    // This bit keeps note of whether the Tx shift register has something in it.
    //
    static bit Tx1RegisterEmpty;


    static void MDSB_Uart_Initilialise(void)
    {
    EnableSerialInterrupt1(0);

    //
    // Run at 230 KBaud.
    //
    UART230 |= (1<<1); // High Speed Baud Rate Generator [HSBRG]
    enabled for UART1
    SMOD1 = 1; // Select fast HSBRG [230K] SMOD1 = 1 (in
    EICON.7)

    SCON1 = (1<<6) + // Mode 1
    (1<<5) + // MCE
    (1<<4) + // REN
    (0<<3) + // ! TB8
    (0<<2) + // ! RB8
    (0<<1) + // ! TI
    (0<<0); // ! RI
    Tx1RegisterEmpty = 1;// Tx buffer is empty

    PutsUart("'FX2: UART230=");PutUnsignedUart(UART230);
    PutsUart(", SCON1=");PutUnsignedUart(SCON1);
    PutsUart(", EICON=");PutUnsignedUart(EICON);
    PutsUart("\n");

    #if 1
    {
    char s[20]="Rx:";
    TB81 = 1; SBUF1 = 'A';
    while ( ! TI1 )/*wait*/; TI1 = 0; TB81 = 1; SBUF1 = 'B';
    while ( ! RI1 )/*wait*/; s[3] = SBUF1; RI1 = 0;
    while ( ! TI1 )/*wait*/; TI1 = 0; TB81 = 1; SBUF1 = 'C';
    while ( ! RI1 )/*wait*/; s[4] = SBUF1; RI1 = 0;
    while ( ! TI1 )/*wait*/; TI1 = 0; TB81 = 1; SBUF1 = 'D';
    while ( ! RI1 )/*wait*/; s[5] = SBUF1; RI1 = 0;
    while ( ! RI1 )/*wait*/; s[6] = SBUF1; RI1 = 0;
    s[7]='\n';
    s[8]=0;
    PutsUart(s);
    TI1 = 0; // Clear transmitter interrupt
    Tx1RegisterEmpty = 1;// Tx buffer is empty
    }
    #endif

    EnableSerialInterrupt1(1);
    }
     
    Bill Davy, Mar 8, 2008
    #1
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