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electrical power draw by x86 assembly language instructions

Discussion in 'Embedded' started by Albretch Mueller, Dec 14, 2009.

  1. ~
    a MOV instruction in assembly (or the "=" to set a value in a variable
    in high level languages) and a division or module operation have
    totally different requirements regarding electrical power needs due to
    requirements such as their logical engagement (number of cycles
    needed), the amount and type of context they need to operate on
    (Floating-point operations are more demanding), the actual physiscs of
    the components on the circuit board, ... etc
    ~
    I could imagine that also relates to the motherboard architecture and
    that there may be fluctuations, but for commercial x86 processors, is
    there a list with the instruction set and their power consumption?
    ~
    Thank you
    lbrtchx
     
    Albretch Mueller, Dec 14, 2009
    #1
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  2. Albretch Mueller

    larwe Guest

    Can't be quantified. For example consider that you execute "NOP". Not
    much happening, right? But what if that NOP is at the end of a cache
    line, and it causes a cache fill?

    Or simplify the assumptions, say you have no cache and no MMU, just a
    simple core executing instructions. Same NOP. Execute it at address
    0x00000000 and PC is incremented to 0x00000001. One flip-flop changes
    state. But what when you execute the same NOP at address 0xFFFFFFFF?
    PC is incremented to 0x00000000; 32 flip-flops change state!

    Power consumption in processor cores is expressed in MIPS/mW typically
    (with a "reference" instruction mix being executed). It's not broken
    down into the J/instruction level. Oddly enough you are the third
    person in the last two weeks who has asked this kind of question in my
    hearing. Are you, too, trying to quantify the power consumption
    difference between traditional and quantum computers?
     
    larwe, Dec 14, 2009
    #2
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  3. Albretch Mueller

    vladitx Guest

    Compared with the draw of everything else on the motherboard -
    definitely.
    It has lots of FFs both from complexity and pipelining, so it should
    draw more. Just like the DSP MACs you described. Again, depends on
    compared to what.
    Probably again their comparative complexity, roughly times the
    pipeline stages.

    BF keeps damn cool, I wish they fix the insane core errata and release
    the 51x family.
     
    vladitx, Dec 14, 2009
    #3
  4. If you're determined to measure it, it's feasible. The security community
    got a serious scare when it turned out to be possible to detect instruction
    sequences and even data values from secure processors - microcontrollers or
    more complex parts like PCI crypto accelerators. That meant the crypto on
    your bank card or mobile phone SIM could be cracked by simply putting a
    resistor in the power supply, recording the voltage across it with a scope,
    then a bit of statistical crunching to extract the crypto keys being used by
    the instructions (and therefore steal money).

    This is a big research field - Google 'differential power analysis'.
    There's lots of effort gone into securing against DPA.
    Most of the examples are on microcontrollers or FPGAs - I'm not sure how far
    it has been extended into more complex processors.

    But this doesn't really apply if all you care about is saving the battery.

    Theo
     
    Theo Markettos, Dec 14, 2009
    #4
  5. Interesting !
    Are you working on some kind of mobile or handset technologies ?

    Karthik Balaguru
     
    karthikbalaguru, Dec 15, 2009
    #5
  6. Good illustrative example :)
    Interesting !

    Karthik Balaguru
     
    karthikbalaguru, Dec 15, 2009
    #6
  7. Yes,it seems that Differential Power Analysis does not help in
    identifying the power
    requirements of particular instructions and deals only with analyzing
    power
    consumption measurements.

    Karthik Balaguru
     
    karthikbalaguru, Dec 15, 2009
    #7
  8. Why would you actually want to do this " per instruction level power
    consumption" list & analysis ?

    Karthik Balaguru
     
    karthikbalaguru, Dec 15, 2009
    #8
  9. ~
    Well, I used to work in a project which next step was going to be a
    wireless implementation so I read quite a bit on Symbian programming
    (some time ago) and as I remember therewere ways to know to a great
    extent the actual physical taxing of single instructions in those
    small processors
    ~
    ~
    As I explained above. Isn't coding thinking on sparing some energy
    honorable and even appealing? ;-)
    ~
    Thanks
    lbrtchx
     
    Albretch Mueller, Dec 15, 2009
    #9
  10. What kind of ways are available in those small processors ?
    Any links / documents ?
    But, i think Handset technologies do not use x86.
    Is there any handset that uses x86 ?

    I think, nowadays they mostly use ARM & DSP processors.
    Sometimes, only one processor that encompasses both.
    I think, your query should be even more specific towards it.
    Can you tell the exact processor and OS platform you use ?

    Karthik Balaguru
     
    karthikbalaguru, Dec 15, 2009
    #10
  11. For old TTL and ECL processor boards, the power consumption was
    independent of calculations.

    For any CMOS logic, the power consumption is directly proportional to
    the operating frequency and to the square of the operating voltage.

    Unfortunately, these days, most of the gates are clocked at the clock
    frequency, thus the power consumption is constant, unless some
    halt/wait instructions are used to disable the clock from most gates.
     
    Paul Keinanen, Dec 15, 2009
    #11
  12. Albretch Mueller

    vladitx Guest

    For the x86 case, probably yes - I never had to get intimate with x87
    and the horde of heirs.

    In the general case, many FPUs are coprocessors which execute their
    pipeline async to the CPU up to a stall. I know at least one which had
    bit to select sync/async operation.
    Two or more buses. I think most MACs have pipeline longer than one,
    which is covered by the penalty of branching.
    Anyone who designed similar things may jump in and correct us. :)
    I believe your meter readings. My comment was whether you compared it
    to the i486 VCCint consumption only (harder to setup) or the whole
    board.

    The real interesting case is not x86 but MCUs. And since I don't deal
    often with FPU-blessed MCUs, I will keep your MACs-have-higher-
    consumption observation in mind, because it is very logical, too.
     
    vladitx, Dec 16, 2009
    #12
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