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Frequency generation IC recommendation...(Fractional n synthesizer)

Discussion in 'Embedded' started by kishor, Apr 24, 2009.

  1. kishor

    kishor Guest

    Hi friends,

    I am working on Axis controller project.
    In this I have to generate frequency from 1Hz to 100KHz,with 0.1%

    PCA of micro-controller will not generate frequency at higher range
    with 0.1% accuracy.
    (I am using SILAB c8051F340 controller.)

    Please suggest me any frequency generator IC solution, which I can
    control through 8051.

    Thanks in advance,

    kishor, Apr 24, 2009
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  2. Use a DDS. If you go to www.analog.com and search for a DDS, you'll find a
    plethora of chips.
    You can also build your own using a CPLD.

    Meindert Sprang, Apr 24, 2009
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  3. digital or analog?

    Micro Linear used to make a SPI controlled 8 pin chip
    that could generate very accurate sinewave in your range.
    Don't know if they still make them.
    RumpelStiltSkin, Apr 24, 2009
  4. kishor

    Leon Guest

    I'd use a software DDS for low frequencies like that. It'll be cheaper
    and use less power.

    Leon, Apr 24, 2009
  5. The 100 kHz requirement would suggest executing an interrupt service
    routine every 3..4 microsecond. Is it realistic for that
    microcontroller ?

    Paul Keinanen, Apr 25, 2009
  6. kishor

    kishor Guest

    Hi guys,
    Thanks for quick reply.

    I forgot to say that I want frequency in "SQUARE WAVE" form.
    I suppose DDS is for sine-wave generation.

    Well, I am also thinking about fractional frequency divider.

    for that I have to use CPLD. But we are not familiar with that.
    So we are finding ready solution.
    Otherwise we don't have any options.

    Please reply me, If I wrong or something missing.

    kishor, Apr 25, 2009
  7. When doing it software, you can reprogram the look-up table from sine
    to any waveform you like, such as square wave.

    Any duty cycle requirement will complicate the issue.

    Paul Keinanen, Apr 25, 2009
  8. kishor

    -jg Guest

    You need to be more specific.

    Do you mean you want to specify the frequency to 3 digits of
    precision ?.
    100.0KHz and 100.1KHz ?

    in time domain, that's (1/100e3)-(1/100.1e3) ~ 10ns (100MHz

    Can you tolerate jitter, or is it better to be stable, even if 0.04%
    off ideal ?

    How do you want to enter Freq values, Decimal, or Binary ?
    Google Rate Multiplier, for one CPLD-compatible solution

    The ADF4xxx series of devices, have been very well designed for
    'alternate uses' as they allow any divider value, and a Ctr out

    You do need a external Clock source, or VCO.

    If you want it all in one package, I'd look to vary an external clock
    into the uC
    over a >2:1 range, and then binary-scale inside the uC.

    For that, look for Clock synthesisers - something like the i2c

    FS714x from OnSemi (on Chip 40-400MHz VCO+Dividers), coupled with
    dividers inside the uC, would easily exceed your spec. [Silabs have
    Si57x, but I think they are hard-coded.]

    -jg, Apr 25, 2009
  9. kishor

    linnix Guest

    It will not be easy to get 0.1% accuracy with RC components.
    Yes, you can program a CPLD as a 10 bits counter and reset at the
    target count. You can use a µC for interfaces and setup the target
    count register.
    linnix, Apr 26, 2009
  10. What is required resolution?

    Was it 10K-100K, digital, 0.1% accuracy?

    That shouldn't be hard with any fast micro with wide timer.
    Maybe even a slow one using PWM output into a divide by two latch
    to get a square wave. You'd have to calculate it out to see for sure.
    Rumpelstiltskin, Apr 26, 2009
  11. kishor

    -jg Guest

    The op said 1Hz - 100Khz, 0.1% at 100Khz is 100.1KHz or 99.9KHz, so
    a 100MHz time-base. Not quite any uC ...

    A CPLD needs 17 bits for the octaves, and 10 bits for the 0.1%, and
    also needs a 100MHz clock.

    A RC solution is not crazy, if you had a Frequency-Reader (and so use
    that to calibrate/verify your frequency).
    That would need a 12 bit DAC, a > 2:1 DAC controlled Oscillator cell,
    and then Binary dividers in the uC.
    It would be cheap, and low power.

    TI claims this for their Piccolo series Controllers
    "150ps resolution on PWM frequency and duty cycle"
    - still not sure how they nail 150ps in Frequency domain ?!
    - has anyone used one of these yet ?
    -jg, Apr 26, 2009
  12. Not neccessarily. Many DDS chips have a comparator on board to create a
    square wave. If you do your own DDS in a CPLD, just omit the DAC and use the
    highest phase accumulator bit as your square wave output.

    Meindert Sprang, Apr 28, 2009
  13. kishor

    Rocky Guest

    To get a nice square squarewave with low jitter one can feed the sin
    wave output to a comparitor or some other squaring circuit.
    Rocky, Apr 29, 2009
  14. kishor

    kishor Guest


    Now we have two options,
    1. Master 8051 --> DAC (16-bit, 4 channel) --> V/F converter --> Slave
    8051 (Binary divider)

    Master 8051 controls the Source clock to each Slave 8051.
    Each Slave generate frequency for each axis.

    2. Master 8051 --> Motion control IC e.g. NOVA , PMD, NIPPON

    Which one is better ????.

    And one more thing about these motion control IC's.
    They are giving frequency from 1Hz to 65535 Hz in 16-bit resolution.
    and multiplier 0.1,1,100 to widen the range.

    what technique they r using????

    kishor, Apr 29, 2009
  15. kishor

    -jg Guest

    You do not need a 16 bit DAC for 0.1% resolve, something like 10bits
    exceed 0.1% step size over a 2:1 V-F ratio.
    or 3. 8051 and any Micro-Stepping Stepper Controller from
    Depends on the price, and speed of completion desires.
    A dedicated chip (if you can find one) will usually get you working
    faster, but cost more in production.

    -jg, Apr 29, 2009
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