How to enable #SMI trap on MMIO accesses .

Discussion in 'Tyan' started by fox, Nov 12, 2007.

  1. fox

    fox

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    I have a problem with the tyan thunder n3600M S2932 motherboard for with AMD barcelona chip. The document (Bios kernel and developers guide 31116 for Barcelona) suggests under title "2.11 configuration space" that you can set a #SMI (system management interrupt) on a MMIO access .
    Programming MSRC001_0059 with r/w trap enable bits and MSR's MSRC001_00 [5D:5A] for address and Mask dosent raise the #SMI. For some reason it seems that BIOS Rev. V2.01 dosen't program any of it as the enable bit of MSRC001_0058 too turned up disabled from BIOS. enabling it does give access to processor configuration space but no #SMI traps. Programming bit 25 of MSRC001_0056 SMI Trigger IO Cycle Register seemed related but programming that too dosen't help. Am i missing something here ??
    does anyone have a clue to this ??
     
    Last edited: Nov 13, 2007
    fox, Nov 12, 2007
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