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Laying out ddr traces

Discussion in 'Embedded' started by Simon, Sep 30, 2012.

  1. Simon

    Simon Guest

    So, I'm trying to attach some DDR SDRAM to a blackfin DSP. It's the first time I've tried to lay out DDR, and I'm not finding it easy-going...

    Here's an image of the left side of the DSP and the entire DDR chip... http://0x0000ff.com/imgs/eagle/bga-ddr.png.

    In line with what I've been reading, I was trying to get CK,/CK laid out first, then sync up address[0:15], ba[0:3], /RAS, /CAS, /WE, and /CKE. Even at this first stage, it's looking like it's going to be hard - the differential clock signals need to be (a) parallel to each other and (b) the same length (or near as makes no difference), and then all the others above need to match to within 100 mils of the length of CK!

    This doesn't begin to compare to the full list of restrictions (all traces under 1.1", bytes lanes length-matched, traces in same group on same layer,all traces to be one layer away from a full ground plane,... the list goeson).

    I'm using Eagle, have done for years, and its not really helping me at thispoint. Trying to route the differential pair CK, /CK as an actual differential pair makes it ignore the design constraints that have been set up and even routes the paired signal over another pad while you're routing the first of the pair.

    So, is there anything out there that is (a) relatively cheap (this is stilla hobby, and I've a $3k BGA placement machine already budgeted for, I don't want to spend *too* much more...), and (b) does a good job ? Eagle's beengreat up until now, but I can't help but think I'm pushing its limits. Or am I wrong in this, and do all PCB layout engines suck, and this task (DDR routing) is just way harder than it ought to be ?

    Cheers
    Simon
     
    Simon, Sep 30, 2012
    #1
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  2. Simon

    Paul Guest

    These sorts of things can be hard.

    Eagle has various scripts available for giving you the stats on trcak
    lkength etc, in their download section.

    Newer version 6 and its autorouting module adds some functions for
    differential pairing of follow me routing, apparently good for pairs of
    signals not so good for larger numbers of signals at same time.


    --
    Paul Carpenter |
    <http://www.pcserviceselectronics.co.uk/> PC Services
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    Paul, Oct 1, 2012
    #2
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  3. Simon

    Remember that your clk/clkn lines are only loosely coupled. They are in fact each nearly 50R to Gnd, rather than 100R w.r.t. each other. Unless your other signals are spaced out enormously, then one track picks up very diferent noise to the other and you don't get common mode noise. Being digital the differential mode rejection is enormous, you're not routing audio where afew mVolts will get heard. Better tools are better, but remember that yourbreak out is trivial compared to a big FPGA, or take a look at a TI AM3892(on .65mm pitch BGA) to see an example of routing that can't be done nicely but works just fine.

    Also, before spending a lot, take a look at the BGA reflow oven that www.pcb-pool.com sell.

    Best of luck
    Colin
     
    colin_toogood, Oct 1, 2012
    #3
  4. Simon

    I've missed a couple of important sentences :). The point is, that if your two differential tracks are not precisely parallel to each other it really won't matter a great deal. In real life they will split apart at both ends of the track for break out and if you are length matching you will put a jiggle in one of them somewhere as well. You will still get about 100R differential and there will be nothing wrong with the quality of signal on them.

    I also just took a look at pcb-pool. Their homebrew reflow system is shown in the news for 2009 but it doesn't look like you can buy it any more.

    Colin
     
    colin_toogood, Oct 1, 2012
    #4
  5. Simon

    Simon Guest

    Thanks Colin. Good to know. The "rules" I was trying to follow did appear to be mutually contradicting each other :)
     
    Simon, Oct 1, 2012
    #5
  6. Simon

    Paul Guest

    Do you mean the one at

    http://www.beta-estore.com/rkuk/index.html


    --
    Paul Carpenter |
    <http://www.pcserviceselectronics.co.uk/> PC Services
    <http://www.pcserviceselectronics.co.uk/fonts/> Timing Diagram Font
    <http://www.gnuh8.org.uk/> GNU H8 - compiler & Renesas H8/H8S/H8 Tiny
    <http://www.badweb.org.uk/> For those web sites you hate
     
    Paul, Oct 2, 2012
    #6
  7. Simon

    dbr Guest

    With Eagle, tracks can be routed manually and restricted areas placed
    where needed, then the autorouter will work around those lines.

    Hul

     
    dbr, Oct 3, 2012
    #7
  8. Simon

    Simon Guest

    So, on a slightly different, but related note... How crucial is the 50-ohm impedance between the DDR2 and the DSP chip ?

    Having worked out via the formulae on the various sites around the 'net, I'm getting a characteristic impedance for my traces much more like 75R or 100R (depending on dielectric thickness) than 50R. I realise it's me being a cheapskate (4 or 6-layer board, not 8-10+) and 5-mil traces not 3 or 4, butis it crucial ? The DDR clock will be ~250MHz max, (so 500M data tokens per sec) if that's useful to know...

    The datasheet seems to indicate the DDR chip can enable 75R termination resistors using ODT, but the Analog devices engineering note (EE349) seems to suggest that the impedance *must* be 50R.

    Cheers
    Simon
     
    Simon, Oct 7, 2012
    #8
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