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msp430f2013 Timer_A UART

Discussion in 'Embedded' started by tonykl, Jun 14, 2006.

  1. tonykl

    tonykl Guest

    Hey there,

    I'm trying to make a simple project work. There's a demo:
    MSP430F20xx Demo - Timer_A, Ultra-Low Pwr UART 2400 Echo, 32kHz ACLK
    from TI, it does work but I wanted to use p1.2&p1.6 ports instead of
    p1.1&p1.5
    (TA1 instead of TA0) so I changed lines

    RXD EQU 002h ; RXD on P1.1
    TXD EQU 020h ; TXD on P1.5

    with

    RXD EQU 004h ; RXD on P1.2
    TXD EQU 040h ; TXD on P1.6

    after that I changed &CCTL0 and &CCR0 with &CCTL1 and &CCR1
    respectively.
    It won't work :( Any suggestions?


    This is the code:


    RXD equ 004h ; RXD on P1.2
    TXD equ 040h ; TXD on P1.6

    ; RAM Registers Used
    RXTXData equ 0200h ; Register for RX or TX UART
    Data
    BitCnt equ 0202h ; Register used to count UART
    bits
    MYTXA equ 'A'
    ;
    ; Conditions for 1200 Baud SW UART, ACLK = 32768
    Bitime_5 equ 014 ; .5 bit length + small
    adjustment
    Bitime equ 027 ; 427us bit length ~ 2341 baud

    ;-----------------------------------------------------------------------------

    ORG 0F800h ; Program Start
    ;-----------------------------------------------------------------------------

    RESET mov.w #280h,SP ; Initialize Stackpointer
    call #Init_Sys ; Initialize System
    Peripherals
    again
    mov.w &MYTXA,&RXTXData
    call #TX_Byte ; TX Back RXed Byte
    Received
    jmp again

    Mainloop call #RX_Ready ; UART ready to RX one Byte
    bis.w #LPM3,SR ; Enter LPM3 Until Byte
    RXed
    call #TX_Byte ; TX Back RXed Byte
    Received
    jmp Mainloop ;
    ;
    ;-----------------------------------------------------------------------------

    Init_Sys ; Subroutine to set-up peripherals
    ;-----------------------------------------------------------------------------

    StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
    SetupTA mov.w #TASSEL0+MC1,&TACTL ; ACLK, continous mode
    SetupC0 mov.w #OUT,&CCTL1 ; TXD Idle as Mark
    SetupP1_2 bis.b #TXD,&P1SEL ; P1.1/TA0 for TXD function
    bis.b #TXD,&P1DIR ; TXD output on P1
    bis.b #RXD,&P1SEL ; P2.2/TA0 as RXD input
    eint ; General Enable Interrupts
    ret ;
    ;
    ;-----------------------------------------------------------------------------

    TX_Byte ; Subroutine that Transmit One Byte from RXTXData Buffer.
    ;-----------------------------------------------------------------------------

    TX_1 mov.w &TAR,&CCR1 ; Current state of TA
    counter
    cmp.w &TAR,&CCR1 ; !!Prevent async
    capature!!
    jne TX_1
    add.w #Bitime,&CCR1 ; Some time till first bit
    bis.w #0100h, &RXTXData ; Add mark stop bit to
    RXTXData
    rla.w &RXTXData ; Add space start bit
    mov.w #10,&BitCnt ; Load Bit Counter, 8 data
    + SP
    mov.w #OUTMOD0+CCIE,&CCTL1 ; TXD = mark = idle
    ;CCIS0+
    TX_Wait bit.w #CCIE,&CCTL1 ; Wait for TX completion
    jnz TX_Wait ;
    ret ;
    ;
    ;-----------------------------------------------------------------------------

    RX_Ready ; Subroutine that will Receive One Byte into RXTXData Buffer.
    ;-----------------------------------------------------------------------------

    mov.w #08,&BitCnt ; Load Bit Counter, 8 data
    bits
    SetupRX mov.w #SCS+CCIS0+OUTMOD0+CM1+CAP+CCIE,&CCTL1 ; Sync,Neg
    Edge,Cap
    ret ;
    ;
    ;-----------------------------------------------------------------------------

    TAx_ISR ; CCR1/UART ISR: RXTXData Buffer holds UART Data.
    ;-----------------------------------------------------------------------------

    add.w #Bitime,&CCR1 ; Time to Next Bit
    bit.w #CCIS1,&CCTL1 ; RX on ISCCIB?
    jnz UART_RX ; Jump --> RX
    UART_TX cmp.w #00h,&BitCnt ;
    jne TX_Next ; Next bit?
    bic.w #CCIE,&CCTL1 ; All Bits TX or RX,
    Disable Int.
    reti ;
    TX_Next bic.w #OUTMOD_4,&CCTL1 ; TX Mark
    rra.w &RXTXData ; LSB is shifted to carry
    jc TX_Test ; Jump --> bit = 1
    TX_Space bis.w #OUTMOD_4,&CCTL1 ; TX Space
    TX_Test dec.w &BitCnt ; All bits sent (or
    received)?
    reti ;
    ;
    UART_RX bit.w #CAP,&CCTL1 ; Compare mode for start
    bit edge
    jz RX_Bit ; Start bit edge?
    RX_Edge bic.w #CAP,&CCTL1 ; Switch to Compare mode
    add.w #Bitime_5,&CCR1 ; First databit 1.5 bits
    from edge
    reti ;
    RX_Bit bit.w #SCCI,&CCTL1 ; Get bit waiting in
    receive latch
    rrc.b &RXTXData ; Store received bit
    RX_Test dec.w &BitCnt ; All bits sent (or
    received)?
    jnz RX_Next ; Next bit?
    ;>>>>>>>>>> Decode of Received Byte Here
    <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
    RX_Comp bic.w #CCIE,&CCTL1 ; All Bits RXed, Disable
    Interrupt
    mov.w #GIE,0(SP) ; Decode Byte= Active in
    Mainloop
    ;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
    RX_Next reti ;
    ;
    ;-----------------------------------------------------------------------------

    ; Interrupt Vectors Used MSP430x11x1
    ;-----------------------------------------------------------------------------

    ORG 0FFFEh ; MSP430 RESET Vector
    DW RESET ;
    ORG 0FFF0h ; Timer_A0 Vector
    DW TAx_ISR ;
    END
     
    tonykl, Jun 14, 2006
    #1
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  2. tonykl

    itsme! Guest

    The TACCR0 interrupt and the TACCR1 interrupt are handled differently.
    When you use TACCR1, the interrupt service routine should go through
    the TAIV vector. See SLAU144b.pdf Section 8.2.6 for details.

    &MYTX should have been #MYTXT
     
    itsme!, Jun 17, 2006
    #2
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