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Problems in C55x: execution from SDRAM

Discussion in 'Embedded' started by itabhiyanta, May 3, 2006.

  1. itabhiyanta

    itabhiyanta Guest

    I saw our posting on comp.dsp and took the liberty of writing to you.I
    need help badly (so i am writing directly to you)since my project is
    stuck and i am out of ideas now.

    I have been trying to port my code to the SDRAM using the Hex Utility
    (hex55). I have no clue as to how can i place my code into SDRAM.

    I will give you a slight background of the things i am doing.
    I am using CCS3.1 and an EVM5502 kit. The CSL i am suing is
    When i compile my app (i am using BIOS) i create a new memory module
    named SDRAM (word addressed) and place everything except .hwi_vec into

    o:=0x8000 l:=0x200000 (4MB)

    Now i get a map file which echoes this action. Now using flash burn and
    some minimal options like (-parallel16, -boot, -m2, etc., -e cint) is
    it possible to place code in SDRAM( i also configure PLL and EMIF in my
    cmd file). I mean i am not sure if the code is actually running from
    SDRAM(when i see on oscilloscope i don't get anything). But the code is
    running (an audio loopback basically) and i can hear music.
    I presume it is running form DARAM (since it is of small size{hex file}
    46k only).

    Can someone guide me into how to place the code in flash and then start
    running from SDRAM. I have a larger code size which i will have to
    ultimately place in SDRAM and run from there only, DARAM can't support

    Please help me out. Thanks for reading along.
    P.S.:- attached below is cmd file(extension changed to cm1<--
    attachement problems) i use to generate my hex file.

    /* Use CCS to build the FlashBlink.out program
    * by opening the FlashBlink.pjt file and selecting
    * Build. After that, open a DOS window in the same
    * directory and type
    * hex55 post_hex.cmd
    * to produce post.hex for downloading.
    * Use the FlashBurn application to download.
    -boot /* Place all initialized sections in image
    -v5510:2 /* Set processor type */
    -parallel16 /* Set Flash system memory width */

    /*************PLL AND EMIF*****************/
    -reg_config 0x1c80, 0x000c /*Oscialltor Power Down and PLL in reset
    asserted state*/
    -reg_config 0x1c88, 0x000a /*Multiplier of 10 in PLLM*/
    -reg_config 0x1c8a, 0x8000 /*Divider D0 enabled divide by 1*/

    /*DELAY of 1us = 200 clock cycles*/

    -delay 0xc8
    -reg_config 0x1c80, 0x0004 /*Reset is released*/

    /*DELAY for Locking = 256 clock cycles*/

    -delay 0x100
    -reg_config 0x1c80, 0x0005 /*PLL mode enabled*/

    /* Now setting the Clock Groups */

    -reg_config 0x1c8c, 0x8000 /*Setting DMA clocks to 200Mhz*/
    -reg_config 0x1c8e, 0x8000 /*Setting McBsp base clocks to 200Mhz*/
    -reg_config 0x1c90, 0x8001 /*Setting Up EMIF cloc to 100Mhz*/
    /*CLKOUT3 is configured at RESET as 000b which makes it run at
    /* Hence DSP core is running at 200Mhz*/
    /*CLKMD which controls X2/CLKIN as the clock input*/
    /*XBSR which selects EMIF 32 bit bus operation */
    /*Both of them have been enabled by GPIOs*/

    /*(Now Configuring EMIF)*/

    -reg_config 0x0800, 0x0020
    -reg_config 0x0800, 0x0020
    -reg_config 0x0804, 0xFF33
    -reg_config 0x080C, 0xF000
    -reg_config 0x080D, 0x4748
    -reg_config 0x080E, 0x0001
    -reg_config 0x0822,0x0002

    /*******PLL and EMIF settings end**********/
    -e _c_int00 /*Entry Point is Main */
    -m2 /* Select Motorola-S1 */
    -o evm_apps.hex /* Name hex output file */
    -map evm_apps.map /* Name hex utility map file */
    evm_app.out /* Input COFF file */

    PAGE 0 : ROM : o=0x400000, l=0x80000

    itabhiyanta, May 3, 2006
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