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Relationship between PCM and PWM audio

Discussion in 'Embedded' started by Keith Brafford, Nov 22, 2003.

  1. What is the relationship between PWM and PCM data?

    If I take WAV audio data and want to embed it in a little processor
    where I am going to drive a PWM generator at 14.4KHz, what
    (if anything) should I do to the PCM data from the WAV file?

    Also, what do I do if I want to go the other way?

    Keith Brafford
    Keith Brafford, Nov 22, 2003
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  2. What is the relationship between PWM and PCM data?

    It depends on how your drive circuit and speaker respond to different
    PWM duty cycles, and what manufacturer-supplied hardware, firmware and
    software magic sits between your original sample, the converted,
    compiled version, and the actual speaker. There will be an import
    phase in the compiler (if we're talking about the chips I think we're
    talking about), and some hardware magic in the chip itself.
    If this is apropos of the chips we've been talking about in email, you
    should at the very least low-pass filter your audio with a cutoff of
    say 7200Hz. You should also try high-pass filters with a cutoff of
    60-65Hz. There is a lot of trial and error here.
    Once you've massaged the audio to sound passable out of a toy
    squeaker, there's no going back. Keep backups of the original files
    for any future re-processing! What's the thrust of this last question?
    Lewin A.R.W. Edwards, Nov 23, 2003
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  3. I assume that your pulse starts at regular intervals every 1/14400 s
    and the length of the pulse is controlled by a (say) 8 bit counter,
    thus the pulse width can have 256 different values. To do this, you
    would have to run the counter at 14.4 kHz * 256 or 3686.4 kHz or
    nearly 4 MHz.

    If your audio samples are linear 8 bit PCM in sign magnitude
    representation, you would have to convert to offset notation by adding
    128, so that the original 0 becomes 128, creating a 50 % duty cycle.
    After this, the sample can be directly loaded into the counter, but of
    course this has to happen _synchronously_ between the pulses.

    Thus, this would be a simple 1 bit DAC.

    However, if the original data is 8 bit PCM from some telephone system,
    this would be compressed according to the A or u-law, which in fact
    are floating point representations. This would have to be converted
    into linear 12 bit representation, requiring a clock frequency of 14.4
    kHz * 4096 or about 59 MHz !

    It is quite clear that simple 1 bit PWM DACs are usable only up to
    8-10 bit audio conversions, since the quantisation noise would be the
    limiting factor.

    While most audio DACs today are 1 bit devices, they have to use
    various oversampling and "noise shaping" tricks, so that most of the
    quantisation noise is concentrated above the audio passband, thus
    reducing the amount of quantisation noise in the audio pass. The
    analog low pass (anti-aliasing) filter will take care of the excessive
    quantisation noise. This noise shaping requires quite a lot of
    computations, so if it is done in software, will require some amount
    of computational power, which the smallest controllers might not have.

    Paul Keinanen, Nov 23, 2003
  4. Keith Brafford

    Ben Bradley Guest

    In comp.arch.embedded, "Keith Brafford"
    How many bits is the counter in this PWM generator?
    Your wav file probably has 8 or 16 bits per sample, which surely
    more bits of resolution than the PWM generator uses. You can truncate
    the samples to the most significant bits, but it will sound better if
    you add the appropriate amount of dither noise first, though for the
    presumed two to four bits, that could be a lot of noise.
    The samples should be put into a properly formatted .wav file.
    For comparison, the original Macintosh used an 8-bit counter
    running at 5-something Megahertz (256 times the sample rate) as part
    of a PWM generator for its 8-bit, 22ksps A/D that drove the speaker.
    That was "good quality computer sound" at the time.
    Ben Bradley, Nov 23, 2003
  5. That's exactly right. This is coming from a PIC running at 3.6864MHz.
    I guess the freqeuency choice the original engineer made makes a lot
    more sense now :)

    I am upgrading a system from and the old PIC and moving over to a
    DSP running at muchos of MHz and I need to make sure the old
    PWM audio system still works just like the PIC did. I am assuming
    that I can pick a crystal frequency for the DSP that will let me duplicate
    the PWM of the PIC.

    The reason I am asking about the PCM/PWM difference is that
    the DSP has a serial port that will bolt up directly to a serial DAC,
    and I was wondering if I should port the PIC algorithm with its
    external hardware to the DSP solution, or if there was some easy
    way to use a serial DAC instead of the PWM solution.

    Are you saying that a PWM running at 14.4KHz, with 8-bit
    values, with, for example, the following series of timer reloads:

    1) 50% [ 0x80 ]
    2) 25% [ 0x40 ]
    3) 75% [ 0xC0 ]

    is equivalent to running an 8-bit serial DAC at 14.4KHz with
    the following samples:

    1) 0x80
    2) 0x40
    3) 0xC0


    Keith Brafford, Nov 23, 2003
  6. Good guess, based on our previous conversation, but those other
    chips are for another part of the board :)

    Check out my response to Paul...I give a detailed description
    of what I am trying to do.

    Keith Brafford, Nov 23, 2003
  7. How do you do that? You just randomize the lowest bit or two
    and it sounds better?

    Keith Brafford, Nov 23, 2003
  8. The purpose of the last question is to better my understanding of what,
    exactly, I am doing with this embedded audio stuff.

    After I get the PIC/(PWM) stuff moved over to the DSP/(PWM or
    DAC) I would like to be able to, in future projects, take audio samples
    I capture on the computer and embed them in something that uses
    a PWM peripheral instead of a DAC. Since I am trying to take
    existing code that PWMs and maybe move it to a DAC, I
    referred to it as "going the other way"...

    Keith Brafford, Nov 23, 2003
  9. Yes, assuming the serial DAC expect unipolar 00..FF range. However, if
    the DAC expects the 2's complement format (with the FF->00 transition
    in the middle of the range), an offset must be added. If the expected
    format is sign/magnitude then some extra calculations are required.

    Paul Keinanen, Nov 23, 2003
  10. Wow, that is so not what my intuition would have told me.

    That means that a constant output to the PWM would result in a constant
    DC on the DAC.

    Yet, I would have thought that a square wave PWM would yield a sine-wave
    audio output...

    Keith Brafford, Nov 23, 2003
  11. If the PWM generates a constant duty cycle square wave, the low pass
    (anti-alias) filter will convert it to a constant DC voltage and since
    audio systems are usually AC coupled, the output is actually zero for
    any constant duty cycle. If the AC coupling capacitor is before the
    LPF, the output is a DC potential depending on the duty cycle. With 50
    % duty cycle the output is 0 V.
    The only way to get a clean sine wave from a constant 50 % PWM square
    wave is to put a high-Q band-pass filter at the _sampling_ frequency,
    in this case 7.2 kHz to filter out the third, fifth, etc odd harmonics
    of the square wave.

    Please note that the low pass (anti-alias/reconstruction) filter after
    any DAC should have a cut-off frequency less than _half_ the sampling
    frequency, in this case below 3.6 kHz. The response from that filter
    should be severely attenuated at the 7.2 kHz sampling frequency, so
    you can not get any useable sine waves out with a constant duty cycle
    square wave.

    Paul Keinanen, Nov 24, 2003

  12. I thought 14.4KHz was the sampling frequency. Is it not in my case?

    Keith Brafford, Nov 24, 2003
  13. Yes. In your case the sampling frequency is 14.4 kHz and the low pass
    filter should cut off around 7 kHz.

    Paul Keinanen, Nov 24, 2003
  14. Keith Brafford

    Ben Bradley Guest

    In comp.arch.embedded, "Keith Brafford"
    That's the gist of it, though perhaps oversimplified. You create a
    random number for each sample (a simple random number generate program
    will do), then add it in scaled so the peak values of the random
    numbers are about equal to the lowest bit value of the bit-reduced
    samples. "Noise shaping" or filtering the noise before it is added may
    help the final wave file sound less noisy, though perhaps at your
    sample rate it could actually increase the percieved noise level.
    Here are the usual links I give that explain dither. It's
    specifically for A/D conversion, but if you think of a .wav file with
    more bits resolution as "analog" and one with less bits as "digital"
    the same principle applies:


    Here's a long explanation: click on articles, then dither:


    As far as sound quality ane the PWM discussion, the DAC solution is
    MUCH better than using PWM. PWM is a cheap way to get analog from a
    purely digital device, but the PWM output has lots of nasty harmonics
    in its output at the sampling frequency and above, and for most apps
    these really need to be filtered. The extra analog filtering on the
    output of the PWM can increase the cost to the point where (nowadays)
    it's often as cheap to use a DAC in the first place.
    OTOH considering low cost in this app may be more important than
    good sound quality, and presuming this chip has PWM built in that you
    wouldn't otherwise use, see if you can live with a 'simple' filter on
    the output. A twin-t R-C notch filter at the 14.4kHz sample rate would
    be cheap, and would work well into your audio amp if it has a high
    input impedance.
    Ben Bradley, Nov 25, 2003
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