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software & hardware interrupts

Discussion in 'Embedded' started by ishita, Sep 4, 2006.

  1. ishita

    ishita Guest

    Hi all,
    I want to know exact difference between software interrupts and
    hardware interrupts.
    I also want to know whether timer interrupt in 8051 is a software
    interrupt or a hardware interrupt.
    Best regards,
    ishita, Sep 4, 2006
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  2. ishita

    CBFalconer Guest

    One is initiated by hardware, the other by software.
    CBFalconer, Sep 4, 2006
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  3. A timer interrupt is a hardware interrupt.
    Software interrupts are an alias for system
    function calls.

    Rene Tschaggelar, Sep 4, 2006
  4. What is a software interrupt ?

    I have never seen such beast :).

    Paul Keinanen, Sep 4, 2006
  5. ishita

    Mad I.D. Guest

    For some CPU there are special instructions that can couse interrupt.
    Like SWI for ARM CPU.
    see on google
    Mad I.D., Sep 4, 2006
  6. How can you claim that something is an interrupt, if you know when it
    is going to occur ??

    Such events (SWI etc.) are no different from, say divide by zero
    traps, which occur synchronously with the program execution and are in
    fact a subroutine call.

    Paul Keinanen, Sep 4, 2006
  7. ishita

    FreeRTOS.org Guest

    I have never seen such beast :).
    Its just a matter of terminology, which is deemed up by marketing bods.

    Not the same as a subroutine call though - more a system call as was states
    earlier. Results in a mode change normally. I think DOS (remember that) is
    built on such things.


    + http://www.FreeRTOS.org
    + http://www.SafeRTOS.com
    for Cortex-M3, ARM7, ARM9, HCS12, H8S, MSP430
    Microblaze, Coldfire, AVR, x86, 8051 & PIC18 * * * *
    FreeRTOS.org, Sep 4, 2006
  8. ishita

    John Perry Guest

    Except that they are handled through the interrupt system rather than
    through the programming interfaces. This is very different from
    subroutine calls.

    The 6809 (and 68K?) SWI instruction had an interrupt vector, just like
    the hardware interrupts. Other processors have the same arrangement.
    At least one operating system I studied used SWI as a system call, since
    the processor had a system space and a user space. The only access to
    system space from user space was through the interrupt system: users
    could not access system space at all. To make a system call, you loaded
    a code into a register and executed a SWI instruction. The OS was
    located in system space, and when the SWI vector was executed, it was
    able to interpret the call and execute the proper system function. Sort
    of primitive virtual memory system.

    Sorry, I can't recall the specific processor or OS. Anyone?

    John Perry
    John Perry, Sep 4, 2006
  9. Because it's serviced by an "interrupt" sequence of events.
    On most processors the are, in fact, _not_ subroutine calls.
    They're synchrounous interrupts. That's why they're called
    Grant Edwards, Sep 4, 2006
  10. The only difference is that the start address is predefined (the
    interrupt vector) and some additional information, such as the
    processor status word is pushed on the stack.
    This is more or less standard practice for operating systems on
    hardware that support separate user and kernel address spaces. It has
    been used at least since the 1970's (e.g. the PDP-11 EMT 377 trap),
    but still I do not consider that mechanism as a true interrupt
    environment, in which the program flow could be interrupted at any

    Paul Keinanen, Sep 4, 2006
  11. ishita

    Mad I.D. Guest

    I get your point but SWI is very alike to regular interrupt except the fact
    we know when it is goint to occur.

    ARM CPU changes operating mode, uses another SP, new registry bank (well
    only 2 new in SWI case).
    Mad I.D., Sep 4, 2006
  12. Yes, but using your logic I also know when a timer interrupt is going to

    Mark McDougall, Sep 5, 2006
  13. Hello ,
    A hardware interrupt is an interrupt generated by external hardware
    connected to the interrupt pin of the processor. We can mask/umask
    these interrupts. An example is: these will be used in simple
    temperature control system - when the temprerature is above 50 degrees,
    then a sensor will generate a signal, which in turn will be connecter
    to the interrupt pin of the processor. Based on the interrupt, you can
    take control action.

    A software interrupt is an interrupt generated by an instruction. An
    example of software interrupt usage is: In a function/subroutine, some
    strange result is got and you do nto want to return that value, in
    those situations, you can use software interrupts. (you can visualise
    this to be like try-catch exception, where you transferthe control)

    Both the interrupts has ISR.
    The timer interrupt in 8051 is a software interrupt. Check SFR

    Best Regards,
    Vivekanandan M
    Vivekanandan M, Sep 5, 2006
  14. ishita

    David Brown Guest

    Pretty much any processor that has different levels of processor state
    (such as "supervisor" and "user" levels for the 68k, or "rings" for the
    x86) has to have a mechanism like this, so that a user-level program can
    pass control to a supervisor-level program (i.e., OS). In most cases,
    the interrupt handling mechanisms are reused (abused?) - hence the term
    "software interrupt". Basically, the SWI instruction (or equivalent)
    sets an interrupt flag just like a peripheral would. Some architectures
    have the decency to give the instruction a sensible name - the 68k ISA
    has 16 separate "software interrupt" instructions, called "Trap #0"
    through "Trap #15". Bigger processors also use the same mechanism for
    trapping errors, such as divide by zero, or address errors, which are
    synchronous to the main code.

    Other methods can be used to get to supervisor level - I believe the x86
    "call gates" are somewhat different from interrupts, and are used for OS
    calls (in 16-bit mode, such as for DOS, they use traditional software
    David Brown, Sep 5, 2006
  15. ishita

    ishita Guest

    Sincere thanks to all of you.
    Best regards,
    ishita, Sep 5, 2006
  16. There are also things in-between a software-generated interrupt and a
    an externally generated interrupt. These are generated by the CPU in
    response to software events. These are sometimes called "traps" or
    "exceptions". Divide-by-zero was mentioned earlier, but there are
    also alignment exceptions, page faults, and other things that are
    more difficult or expensive to detect purely in software.
    Darin Johnson, Sep 5, 2006
  17. Also true for on-chip hardware interrupt sources.
    Not true. The timer interrupt is an example of an on-chip hardware

    Steve at fivetrees, Sep 6, 2006
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