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[SPARCStation 10] Mixing CPU modules/speeds?

Discussion in 'Sun Hardware' started by Bubba, Jun 9, 2010.

  1. Bubba

    Bubba Guest


    I'd like to upgrade my SPARCStation 10, equipped with single SM71 (501-
    2925; SuperSPARC-II 2.4.5 with MXCC 4.5 cache controller and 1MB cache).

    Naturally, I'd like to add another CPU, but failing to find that exact
    module, I came across this:



    And, as stated earlier, CPU modules in SparcStations 10 and can run a
    different clock speeds, the following ones __SHOULD__ work:

    * SM71, SM81


    That is the combination I am aiming at, since I could obtain 501-3033
    (SM81, SuperSPARC-II 2.4.5 with MXCC 4.4). Although MXCC versions seem to
    be discrepant, they are both STP1091 chips so I hope there should not be
    any problems regarding that.

    Can anyone comment or verify this one? Is there any other info about SS10
    I can submit in order to increase chances this really works? What about
    CPU speed, does it decreases to the speed of slower CPU or is slower one
    overclocked? Or do they work asymmetrically?
    Bubba, Jun 9, 2010
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  2. I mixed CPU's way-back-when in a SS10. I believe I had something like
    a SM41 and a SM51 though.

    Things should work because the MBUS (the CPU bus) is asynchronous. I
    found no ill-effects from such a combination of CPUs in that machine.
    Doug McIntyre, Jun 9, 2010
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  3. I think the most important thing to take care of are the major
    revisions of the cache controllers. In your case, both at revision
    4.X should work fine.
    There is no performance penalty for mixing CPUs. The basic
    problem is that you can't tell in advance which CPU will execute
    a job, so you can only guarantee the performance of the slowest
    CPU. It might very well be that the SM71 runs the application
    while the SM81 is idle.

    Dennis Grevenstein, Jun 9, 2010
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