1. This forum section is a read-only archive which contains old newsgroup posts. If you wish to post a query, please do so in one of our main forum sections (here). This way you will get a faster, better response from the members on Motherboard Point.

Waveform storage & var. freq. playback

Discussion in 'Embedded' started by Bob Martin, Nov 11, 2003.

  1. Bob Martin

    Bob Martin Guest

    Can anyone advise me on the best design path for the following
    circuit? I am assuming micro with internal flash memory, unless
    someone has a better option.


    1. Ability to upload a single cycle of a complex waveform generated at
    a fixed frequency in software such as Soundforge, CoolEdit, etc.
    Several file formats are available.

    IOW, it's a process to be do-able by the end user without entering
    look-up tables, etc.

    64 samples per cycle would do. 128 better.

    2. Selectable storage locations for 6-8 of the above arbitrary waves.

    3. Any single stored waveform to be played back continuously, _without
    discernable interrupts_, at a 0.1 to 100 Hz rate, selectable in 0.1 Hz
    increments via 4 BCD switches.

    Stored cycles can include a zero volt interval, if required.

    4. Lowest practical battery consumption on 6V.

    5. Minimum of original design and programming work.

    The issues I see here are the upload software, 0.1 Hz resolution over
    range specified, and transparent detection method for retriggering
    playback of single cycle.

    Thanks for any suggestions.

    Bob Martin
    Bob Martin, Nov 11, 2003
    1. Advertisements

  2. Bob Martin

    Thad Smith Guest

    Meaning max 0f 128*8 = 1024 samples. What resolution do you want for
    your samples? These will determine the amount of RAM you need.
    So you have 16 digital inputs for the switches. The 0.1 to 100 Hz rate
    is for the 128-point cycle, I assume, giving a max update rate of
    128*100 = 12.8 k updates/s. Will you use a D/A as output?
    You can put the processor to sleep between updates.
    The host-resident upload software will depend a lot on the operating
    system, I guess. The output range should be straight-forward for an
    8-bit processor using a timer to generate the update interrupts. What
    do you want to detect transparently? I assume that you would wrap from
    the last point to the first point. While generating the pattern you can
    read the switches for the next sweep to determine whether to recalculate
    another set of sweep parameters or keep running the current one. You
    can generate the exact timing by a combination of division to determine
    the nominal update rate in clock periods, plus Bresenham's method to
    dither the update interval to achieve your exact long-term update rate.

    Any what is this hummer going to do?

    Thad Smith, Nov 11, 2003
    1. Advertisements

  3. Bob Martin

    onestone Guest

    It sounds like the original frequency of the waveform is irrelevant, as
    you later define the playback rate.
    Assume 128 12 bit samples (or 16 bits) per waveform, thats just 2k per
    aveform, plenty of room in a flash based MSP430F149/169 for that.
    To me this reads like you want to playback either 1 sample every 10
    seconds to 100 samples per second, is this correct?. 1000:1 difference
    Otherwise the playback frequency is simply the rate you play each sample.
    Can you not run on a 3.6V Lithium? More efficient.
    Other than the method of uploading the original sample and converting it
    from whatever format to a simple sample representation the rest seems
    0.1Hz resolution of what? the resultant frequency shifted waveform?

    The newer MSP430F169 has DMA and a dual DAC output, making it easy to
    feed the DAC in the background. It runs at 8MHz, so the error should be
    easy to plot. OUTPUT RATES VARY FROM 80,000,000 clock cycles to 80,000
    clock cycles. Assuming you calculate the the clock cycles per sample in
    real time (rather than a table of 1000 entries, although both work fine,
    and round up or down the maximum error between the required (decimal)
    number of clock cycles and the closest integer value is 0.497326 cycles.
    even at the lowest count of 80,000 this is well below your o.1hz error,
    assuming that means what I think it means.

    I don't know what you mean by transparent means of triggering the next
    cycle. I assume it to mean pressing a button without changing the tone.
    This is easily handled with a port interrupt, assuming that the DMA is
    handling the waveform output.


    onestone, Nov 11, 2003
  4. Bob Martin

    Guillaume Guest

    5. Minimum of original design and programming work.

    This just doesn't add up with the rest of the specs.

    Digital signal synthesis is far from trivial, especially if you need
    such small frequency resolution and a (very) low distortion.
    Guillaume, Nov 11, 2003
  5. Bob Martin

    Bob Martin Guest

    64 samples per cycle would do. 128 better.
    8 bit resolution would be fine.
    Yes, a D/A, preferrably internal. The output is to a 500 ohm solenoid,
    driven rail-to-rail via an op amp.
    Just DOS.
    That would work because every waveform is generated at the same
    frequency. Count the points and retrigger. Do you have any suggestions
    about an ideal frequency of generation for this application?
    Would this method provide the 0.1 Hz intervals over the entire 0.1 to
    100 Hz range with the BCD switcing alone?
    It's a calibration unit for magnetic sensors.

    Thanks for your reply.

    Bob Martin, Nov 11, 2003
  6. Bob Martin

    Bob Martin Guest

    That's the idea.
    Yes, and even 8 bit resolution is adequate.
    Yes, and the facility to select every 0.1 Hz interval between them,
    ie. 44.6 Hz, 44.7 Hz, etc..
    The output will drive a magnetic field coil. This requires a minimum
    6V swing for our application. Although we could use some kind of
    doubling configuration, I suppose.
    I was thinking WAV. Is there something else more suitable? I would
    like to keep it as simple as possible.
    Sorry, I should have been more clear. We need to output at 0.1 Hz
    increments throughout the 0.1 to 100 Hz range.
    So we have our 1:1000 tuning range. The BCD's controlling the output
    rate. Is the 0.1 Hz incremental tuning possible using this?
    I meant no noise or discontinuity on reset as viewed on a CRO during
    Thanks for your suggestions.

    Bob Martin, Nov 11, 2003
  7. The Cygnal uC and development boards would be pretty ideal for this.

    They have Analog DACs ( 10-12 bit) on chip, and on chip download/debug,
    as well as PCA counters, which can both prescale and reload.
    You do not get Hz directly, instead you set a reload timer.
    at 0.1-100Hz, and 128 steps, that's 12.8Hz-12.8KHz pickets,

    With a 24Mhz clock in the Cygnal devices, a reload divide of
    appx 2000 is indicated, next is 2001 etc.
    0.1Hz needs divide of 2,000,000, which would be prescale + reload
    combination on the PCA.

    That resolves to appx 0.05Hz on 100Hz if you do a fixed picket

    This may be a little coarse, (if you want accurate 0.1Hz step sizes )
    so what you can also do, is apply some rate multiplier, (or slight
    to the reload values at every sample update.

    With rate multipliers, you get a tiny amount of phase jitter,
    but gain 128:1 in average frequency precision, so go from 50 milliHz
    to under 1 milli Hz of granularity.

    A Divide, or a table, is needed to change BCD Freq, to TimeReLoad

    A good method for wide dynamic ranges, and resolution conserve,
    is a semi-log number :
    Store 16 bits per freq, (2000 bytetable) and a 4:12 bit split
    exponent/mantissa covers 16 octaves, with 1/4096 precision across.
    4 bits -> binary prescale select, and 12 bits -> timer reload.

    Very simple uC SW, and a simple PC pgm to create the semi-log table.

    Jim Granville, Nov 12, 2003
    1. Advertisements

Ask a Question

Want to reply to this thread or ask your own question?

You'll need to choose a username for the site, which only take a couple of moments (here). After that, you can post your question and our members will help you out.